Sep 212016

Probably you have read it on this page before: one of the main components of the Amstrad CPC, the Gate Array aka Amstrad 40010, was decapped and high resolution photos were shot from the internals of this integrated circuit. Finally, Gerald found some time to reverse engineer the schematics of the Gate Array and released them in the CPCWiki forums. With the schematics it is possible to better understand what’s happening inside, find eventually existing hardware tricks / bugs and finally build a replacement of course.

Ash Evans has already “ported” the schematics to Verilog, so it is possible to use it in your own CPLD or FPGA designs.


Thanks a lot for your work to reverse engineer the last integrated circuit (for the classic Amstrad CPC), which can help us to preserve the Amstrad CPCs for the future :-)!

Apr 182016

Do you know the Visual6502 project? The 6502 CPU was decapped and reverse engineered to retrieve more information about the way it works and get a better emulation. On the page you will also find an emulator, which shows you how the CPU works on the chip level. Well, why speaking about this project? Because it is about getting information by reverse engineering the chip and that’s what happened to the Gate Array aka “Amstrad 40010” and some other chips. Robcfg sent some of them to Sean Riddle who was kindly enough to decap the chips and provided the photos. The Gate Array is a custom made chip by Amstrad, which provides e.g. clock frequencies or the colour information for the CRTC. With the photos it is possible to do a reverse engineering and hopefully extract a schematic of it. Maybe it is possible to build a replacement in the future, too.


If you want to help or want more information about it, have a look at the thread in the CPCWiki forums.

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